Summary
The race for miniaturization calls for the introduction of innovative transistor architectures to replace conventional silicon substrate technologies, which can no longer meet Moore's Law requirements beyond the 20nm node. UTBB-FDSOI (Ultra Thin Body and Buried oxide - Fully Depleted Silicon On Insulator) technology significantly improves electrostatic integrity and ensures a gradual transition to the 3D multigrid structures that will be needed for sub-10nm nodes. These devices differ from conventional structures by the presence of a buried oxide linked to the use of SOI substrates. This oxide, located beneath the silicon film, not only modifies the electrostatics of the structure, but also introduces a new Si/SiO2 interface that is prone to degradation. From a reliability point of view, it is therefore essential to assess the impact of this oxide on Front End degradation mechanisms. Furthermore, the reduction in transistor dimensions is accompanied by an increase in variability, resulting in greater dispersion of the transistors' electrical parameters. At the same time, the aging of these transistors introduces an additional form of variability: temporal variability, which needs to be integrated into this average degradation component. This thesis, carried out at STMicroelectronics, is divided into four chapters, the first of which looks at the technological developments required to move from standard CMOS technologies (40LP, 28LP) to this UTBB-FDSOI technology for the 28-20nm node. Then, in the second chapter, we look at average transistor degradation and the impact of architecture on device reliability, studying degradation mechanisms at high temperature under negative bias (NBTI) and degradation by hot carrier injections (HCI). The third chapter focuses at transistor level on the analytical and physical description of NBTI-induced temporal variability. Finally, this temporal variability is integrated at SRAM cell level in the fourth chapter to predict the minimum operating voltage (Vmin) distributions of SRAM memories.