The thesis deals with the study of the reliability of advanced CMOS technologies for digital and mixed applications, i.e. that can include logic and analog blocks, dedicated to radio frequency (RF) applications. The first aspect deals with the validation of the technological quality for nanometric (28-14nm) and micronic (0.5µm) size devices with very distinct architectures between gate stacks (High-K Metal Gate-SiON and SiO2) and channel structures (Fully Depleted Silicon on Insulator, Si Bulk) and LDD-MDD and extended drain structures (LDMOS-EDMOS) The second aspect is the determination of the robustness of these technologies with respect to their degradation in operation, when they are subjected to hot carrier injections (HC), high temperature drift (Bias temperature Instability) and gate dielectric breakdown (Hard and Soft Breakdown). The search for performance in terms of bandwidth and power consumption requires biasing conditions beyond those usually guaranteed for these same components used in logic circuits. Indeed, circuits such as amplifiers (PA) or RF switches, are based on cascode transistors (MOSFET and/or DRIFT MOS), for which the voltages, in off mode, can reach twice the nominal operating voltage for which these components have been developed. These conditions lead to reliability problems where all mechanisms are interacting between hot carriers, gate oxide breakdown and the effect of damage aggravation with temperature. The third objective is to develop static and dynamic worst-case operating tests using a technique of approximating dynamic signals (in switching mode) with digital signals, to establish the contribution of off-mode degradation compared to on-mode. The study shows significant differences between N-channel and P-channel devices when switching in VGS (= Vin) involves the injection of hot holes and hot electrons, respectively, which can lead to the outright breakdown of gate dielectrics (High-K Metal gate). A statistical study has been carried out by developing a compact analytical model that allows to translate the main accelerations in voltage, electric field, gate length and at high temperature.