Study of the reliability of advanced CMOS technologies, from fault generation to transistor degradation

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Summary

The study of reliability represents a major issue in the qualification of technologies in the microelectronics industry. It is traditionally studied by following the degradation of transistor parameters over time, which is then used to build physical models explaining transistor aging. In this work, we have chosen to study the reliability of transistors at the microscopic scale, by focusing on the mechanisms of atomic bond failures at the origin of the creation of defects in the gate oxide. We first identified the nature of the defects and modeled their charge capture dynamics in order to reproduce their impact on complex electrical measurements. This allowed us to develop a new methodology to localize the defects along the Si-SiO2 interface, as well as in the oxide volume. The measurement of defect creation dynamics for hot carrier stresses leading to gate oxide breakdown has allowed us to develop oxide degradation models, predicting the defect profiles created at the interface and in the oxide volume. Finally, we have established a precise link between the impact of transistor degradation on the loss of functionality of a circuit representative of the operation of a digital product.The study and modeling of reliability at the microscopic scale allows for more physical models, thus providing greater confidence in extrapolations of transistor and product lifetimes.

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Journées portes ouvertes
Toulon & Marseille

Samedi 25 janvier de 9h à 17h – Toulon
Samedi 1er février de 9h à 13h – Marseille