- Activity manager
Micro & Nanotechnologies
Campus: Toulon
+ 336 18 07 37 58 / + 33 6 07 72 96 11
A zero-defect circuit could work indefinitely as long as a good compromise of performance, power consumption and reliability has been established in the design flow
Core business
Today, integrated circuits are used regularly and the term "nanoelectronics" has replaced "microelectronics". A circuit is composed of four to five billion elementary transistors, with a specific layout, architecture and routing. ISEN adapts its programs to the expertise required to master these technologies. In addition to fundamental disciplines such as mathematics, physics and chemistry, there are more specific courses dedicated to the physics of materials and to the design of integrated circuits, which are increasingly autonomous and must meet the requirements of robustness, reliability and performance in terms of energy consumption and frequency. Alain Bravaix stresses the importance of providing engineering students with all the tools necessary for the design and testing of these intelligent systems, which are present in all the digital products we use every day.
Prospective
The trend is towards the race to miniaturize integrated circuits and increase the power of processors. Circuits are becoming more and more intelligent and more and more autonomous. The ideal circuit would be a zero defect circuit. When integrated into the circuit, artificial intelligence allows the circuit to learn and adapt, thanks to specific algorithms. It is then able to take into account the environment and the use made of the product to maximize its lifespan despite strong environmental constraints. Faced with the increasing complexity of integrated circuits and the multitude of parameters involved, it is important to consider all possible interactions to anticipate and compensate for performance losses and avoid any failure.
360°
Alain operates in the highly competitive environment of integrated circuit reliability, both nationally and internationally. A multitude of digital products are now flooding the markets, particularly those of transportation, communication, security and defense. For example, in the automotive sector, the cost of electronics has risen to 40% of the price of the vehicle. Alain accompanies students during their technical internships in industry, facilitates their access to the digital world, and encourages them to implement the innovation approach promoted by the school. Alain Bravaix also conducts research on industrial projects and has been supervising thesis students since 2002.
About me
I have been teaching at ISEN since 1994 (PhD 1991, HDR 2007, senior IEEE 2012) in Microelectronics and Device Physics in the Engineering cycle and in the Masters of the region. My research has developed in conjunction with my teaching in the integration of digital technologies, bringing students to doctoral training, as it is a way to become essential to innovation for these industries in very competitive sectors, linking the fundamental to applications, which have become major issues in the development of new technologies based on processors (IoT, automotive, energy-efficient SoC).
Areas of expertise
- Integrated circuit manufacturing
- Reliability of the devices
- Physics of materials and digital circuits
- Expert in the performance and reliability trade-off of CMOS circuits (Si Bulk, FDSOI and FinFET, GAA) in terms of progressive aging (wear) with process voltage and temperature variability (PVT) for high stress mission profiles.
Research and development activities
- In 1994-95 I started with a European contract (JESSI AE 82) for BULL S.A. on AC-DC optimization of high integration CMOS nodes.
- From 1995 to 2014, I had annual direct research contracts with the ST Crolles R&D laboratory in conjunction with regional projects such as CREMSI (1999-00).
- In 2010-11 I worked on a regional project NEXSAFE in collaboration with Nexess and ID3 on the reliability of digital circuits dedicated to RFID surveillance under strong irradiations (gamma source).
- In 2014-2018 I worked on the nano 2017 project on the technology transition from bulk silicon (C40) to metal/High-K/SiON gate stacking (on C28), and then to the transition to FDSOI technology (FD28) for low power and high performance applications.
- In the same period (2014-2018), I worked on a European RESIST project (CATRENE) to develop the first self-adaptive digital circuits for high-performance cores that combine real-time circuit monitoring (in-situ monitors + thermal sensors) to adapt (ART deep learning loops in dynamic control) according to the intrinsic variability of nanometer technologies, the performance and aging levels of the circuits as a function of activity, temperature and circuit load.
- Since 2002, I have supervised 15 PhD students (INPG engineers 33%, ISEN 26%, MINELEC Master 20% and others 6.6%) who graduated between 2005 and 2018.
I am currently supervising 3 PhD students in the framework of R&D projects with ST Crolles and ST Rousset.
Links
Teaching activities
I started teaching in 1992 doing Electronics (N4 ISEN-Lille) and TP (N2 HEI-Lille).
I joined ISEN Toulon (September 1994) doing :
- Digital electronics (course and TD)
- TD of solid state physics to the semiconductor
- Courses and tutorials on device physics (N4)
- TP (N3) (2004)
- Physics tutorials (2009, 2010)
- Supervision of M1 and PFE projects.
Participation in Masters courses:
- M2 MINELEC, Aix-Marseille University (AMU), 2001-2014
- ST University Singapore, 2003
- ST University Fuveau, Aix en Provence 2005-2010
- M2-CMP Gardanne, Aix en Provence, 2007-2009
- M2-Namysis, Toulon, 2002-2004.
Publications
Balance sheet in figures (1990 - 2021)
- Number of publications: 206
- Newspapers: 60
- References : 94
- Guest papers and tutorials: 14
- Awards&Best papers: 9
- Books&Chapters : 3
- Communications: 26
- Theses defended: 15
- PhDs in progress: 3
- Thesis reports: 25
- HDR ratio: 2
Period 2018 - 2021 (May)
1. Publications in journals with reviews (2)
[1] Li S., Bravaix A., Kussener E., Ney D., Federspiel X., Cacho F., "Hot-Carrier Degradation in P- and N- Channel EDMOS for Smart Power Application," Microelectronics Reliab, Vol. 114, pp. 113811-6, 2020.
doi: /10.1016/j.microrel.2020.113811
[2] Tidjani Garba-Seybou, Federspiel X., A. Bravaix, Cacho F., "Modeling HCD interaction between On and Off modes for 28nm FDSOI used for AC RF applications", to be published in Microelectronics Reliab, Vol. 124, p. xxxxx1-6, 2021.
Doi :
2. International conferences (8)
[3.] Huard V., Mhira S., Barclais A., Lecocq X., Raugi F., Cantournet M., Bravaix A., "Managing electrical reliability in consumer systems for improved energy efficiency" , in IEEE International Reliability Physics Symposium, (IRPS), 3C.1-1 3C.1-7, 2018.
Doi: 10.1109/IRPS.2018.8353561
[4.] Mhira S., Huard V., Arora D., Flatresse P., Bravaix A., "Resilient Automotive Products through Process, Temperature and Aging Compensation Schemes," in IEEE International Reliability Physics Symposium, (IRPS), 3D.1-1, 3D.1-7, 2018.
Doi: 10.1109/IRPS.2018.8353568
[5.] Huard V., Ndiaye C., Arabi M., Parihar N., Federspiel X., Mhira S., Mahapatra S., Bravaix A., "Key Parameters Driving Transistor Degradation in Advanced Strained SiGe Channels," in IEEE International Reliability Physics Symposium, (IRPS), P-TX.4-1, P-TX.4-6, 2018.
Doi: 10.1109/IRPS.2018.8353699
[6.] Diouf C., Guitard N., Rafik M., Federspiel X., Bravaix A., Martinez J. J., Muller D., Roy D., "Process optimization for HCI improvement in I/O analog devices," in IEEE International Reliability Physics Symposium, (IRPS), 3B.1-1, 3B.1-6, 2019.
Doi: 10.1109/IRPS.2019.8720544
[7] Bravaix A., Kussener E., Ney D., Federspiel X., Cacho F., "Hot-Carrier induced Breakdown events from Off to On mode in NEDMOS", in IEEE International Reliability Physics Symposium, (IRPS), 3A4-1, 3A4-6, 2020.
Doi: 10.1109/IRPS45951.2020.9129214
[Bravaix A., Li S., Kussener E., Ney D., Federspiel X., Cacho F., "Hot-Carrier Degradation in P- and N- Channel EDMOS for Smart Power Application", 31st European Symposium Reliability on Electron Devices, Failure Physics and Analysis (ESREF) Conf., pp. 1-6, 2020.
https://doi.org/10.1016/j.microrel.2020.113811
[9] Garba Seybou T., Federspiel X., Bravaix A., Cacho F., "Analysis of the interactions of HCD under "On" and "Off" state modes for 28nm FDSOI AC RF modelling", in IEEE International Reliability Physics Symposium, (IRPS), P31-1-6, 2021.
Doi: 10.1109/IRPS46558.2021.9405214
[10] Garba-Seybou T., Federspiel X., A. Bravaix, Cacho F., "Modeling HCD interaction between On and Off modes for 28nm FDSOI used for AC RF applications", 32th European Symposium Reliability on Electron Devices, to be published in Failure Physics and Analysis (ESREF) Conf., pp. xxx 1-6, 2021
Thesis Reporter (2)
Laurent A. " Study of the physical mechanisms of reliability on 3D Trigate/Nanowire transistors", INPG - Phelma, INPG-Minatec, Defended on 05-04-2018.
Sivadasan "Design and Simulation of 28nm FDSOI Digital Circuits for High Reliability", INPG - TIMA, defended on June 29, 2018.
Rapporteur of HDR (1)
Trémouilles D. " Impulsions électriques de forte puissance, de la nanoseconde à la micro seconde, du Watt au kilowatt (ns - µs , W - kW), LAAS Toulouse, defended on 26 March 2019
External Seminars
2019 (2)
Bravaix A.
"Reliability of CMOS circuits: from materials to high reliability systems under strong environmental constraints"
Presentation of my research activities (25 years), Dolphin Integration, 17 July 2019.
Bravaix A., Kussener E
" HC Analysis in H9A NEDMOS "
1er Jalon semestriel projet IPCEI - nano 2022 - ST Crolles, pp. 1 -34, 18 July 2019.
2020 (1)
Bravaix A., Li S.,
" HC Analysis in P-channel and N-channel NEDMOS for Smart Power Application "
2nd Semi-annual Milestone IPCEI project - nano 2022 - ST Crolles, pp. 1 -39, July 8, 2020.
