HDL Modeling

cours-elec

Semester

Level

Language

Specialization

ECTS

Prerequisites

Introduction to the vhdl language
Knowledge of microelectronic design flow
Knowledge of the design of analog functions in microelectronics

Learning outcomes

Know how to model a complex analog function in different levels of abstraction in different description languages (VHDL, VHDL_RN and VHDL_AMS) in order to simulate the function in a digital development environment.

Course content

Modeling a complex analog function in a microelectronic development flow.
The Context of Modeling
Modeling techniques and languages
Levels of abstraction
The simulation
The tools
"Testbench " " simulation environments
Example of HDL development flow
Model checks
Workshops: Constant current capacitive load oscillator
Example of VHDL-AMS co-simulation

Assessment method

Proctored assignment / Practical work.

Prenez rdv pour une visio de 15 minutes

_linkedin_partner_id = "6903274"; window._linkedin_data_partner_ids = window._linkedin_data_partner_ids || []; window._linkedin_data_partner_ids.push(_linkedin_partner_id);